[Clean-ups] Few cleanups in tb.sv #478
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Signed-off-by: Kinza Qamar <kqzaman@lowrisc.org>
marnovandermaas
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Looks good to me thanks for the cleanup.
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I am converting it into draft because the regression result on Xcelium locally looks weird |
Author mentions the regression on Xcelium is not right.
I made a typo in this PR hence causing I've ran a regression for all |
martin-velay
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I have left only nit comments, thanks for this fix and cleanup (and sorry for having introduced it myself)
| logic sim_sram_clk; | ||
| logic sim_sram_rst; |
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Very nit: do you mind re-ordering these 2 signals to keep the logic of having the clk and rst declared before sim_sram_cpu_req
| logic sim_sram_rst; | ||
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| assign sim_sram_clk = dut.clkmgr_clocks.clk_main_infra; | ||
| assign sim_sram_rst = dut.rstmgr_resets.rst_main_n[rstmgr_pkg::Domain0Sel]; |
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Another very nit: could you jump a line between the assigns and the comment below.
And maybe write a comment above these assign to explain why we need to connect to these internal DUT signals
marnovandermaas
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Thanks for sorting the build. It would be good to address the minor comments from Martin before merging.
Signed-off-by: Kinza Qamar <kqzaman@lowrisc.org>
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Hi @martin-velay , I've addressed your comments. Are you happy with them now? |
martin-velay
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Thanks for this required fix and cleanups
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